"CLK0",,"CLK0","CLK0"
"FCCC_0/CCC_INST/INST_CCC_IP:GL0",,"FCCC_0/CCC_INST/INST_CCC_IP:GL0","FCCC_0/CCC_INST/INST_CCC_IP:GL0"
"FCCC_0/CCC_INST/INST_CCC_IP:GL1",,"FCCC_0/CCC_INST/INST_CCC_IP:GL1","FCCC_0/CCC_INST/INST_CCC_IP:GL1"
"FCCC_GL0",20,"IGLOO2_Oversampling_0/CCC_0/CCC_INST/INST_CCC_IP:GL0","IGLOO2_Oversampling_0/CCC_0/CCC_INST/INST_CCC_IP:GL0"
"IGLOO2_Oversampling_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT",20,"IGLOO2_Oversampling_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT","IGLOO2_Oversampling_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT"
"IGLOO2_Oversampling_0/IGLOO2_Oversampling_HPMS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_CONFIG_APB",,"IGLOO2_Oversampling_0/IGLOO2_Oversampling_HPMS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_CONFIG_APB","IGLOO2_Oversampling_0/IGLOO2_Oversampling_HPMS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_CONFIG_APB"
"SERDES_IF_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK_1",,"SERDES_IF_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK_1","SERDES_IF_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK_1"
"FCCC_GL1",8.482,"FCCC_0/GL1_INST/U0_RGB1:YL","FCCC_0/GL1_INST/U0_RGB1:YL"
"EPCS_TX_CLK",8.482,"SERDES_IF_0/EPCS_1_TX_CLK_inferred_clock_RNI9VS5/U0_RGB1:YL","SERDES_IF_0/EPCS_1_TX_CLK_inferred_clock_RNI9VS5/U0_RGB1:YL"
"EPCS_RX_CLK",8.482,"SERDES_IF_0/EPCS_1_RX_CLK_inferred_clock_RNI7NV1/U0_RGB1:YL","SERDES_IF_0/EPCS_1_RX_CLK_inferred_clock_RNI7NV1/U0_RGB1:YL"
